François Tessier

Publications

Authors by alphabetical order
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Talks

• [Invited Talk] Maestro Project Introduction - Fifth Workshop on Programming Abstractions for Data Locality (PADAL'19), Bordeaux, France (2019/09/09) - Talk
• [Paul Coffman] Parallel I/O on Theta with Best Practices - Argonne National Lab. SDL Workshop, Lemont, IL (2018/03/01) - Talk
• [Invited Talk] TAPIOCA: An I/O Library for Optimized Topology-Aware Data Aggregation on Large-Scale Supercomputers - Seminar at Inria Rhône-Alpes, Grenoble (2017/12/21) - Talk
• Toward portable I/O performance by leveraging system abstractions of deep memory and interconnect hierarchies - US Department of Energy Centers of Excellence - Performance Portability Meeting 2017, Denver, CO (2017/08/23) - Talk
• [Invited Talk] System abstractions to facilitate data movement in supercomputers with deep memory and interconnect hierarchy - PADAL'17 Workshop, Chicago, IL (2017/08/03) - Talk
• Short Talk: System abstractions to facilitate data movement in supercomputers with deep memory and interconnect hierarchy - 7th JLESC Workshop, UIUC, Urbana-Champaign, IL (2017/07/17) - Talk
• Toward taming large and complex data flows in data-centric supercomputing - 6th JLESC Workshop, RIKEN AICS, Kobe, JAPAN (2016/12/01) - Talk
• Distributed communication-aware load balancing with TreeMatch in Charm++ - 9th Scheduling for Large Scale Systems Workshop, ENS Lyon (2014/07/01) - Talk
• Distributed communication-aware load balancing with TreeMatch in Charm++ - 11th JLPC Workshop (1st JLESC Workshop), Sophia-Antipolis (2014/06/09) - Talk
• Charm++, what’s that?! - Les Mardis du dev' - Internal training day (2013/10/15) - Talk
• Communication-aware load balancing with TreeMatch in Charm++ - 9th JLPC Workshop, Lyon (2013/06/14) - Talk
• Load balacing and affinities between processes with TreeMatch in Charm++: preliminary results and prospects - 7th JLPC Workshop, Rennes (2012/06/15) - Talk
• Processes placement on multicore. Dynamic load balancing in Charm++ - 10th Charm++ Workshop, Urbana-Champaign, IL (2012/05/07) - Talk

Major Software Developments

• Intermediate Storage As A Cache (ISAAC) : Lightweight library implementing a wrapper of standard MPI-IO calls. Targeting supercomputers with node-local storage (HDD, SSD), ISAAC can take advantage of this memory layer and use it as a transparent cache to significantly improve the I/O bandwidth.
• TAPIOCA : Topology-aware data aggregation C++ library for I/O intensive applications.
• TreeMatchLB : Set of topology-aware load balancing algorithms developed for the Charm++ runtime system including TMLB_TreeBased, a highly-scalable hierarchical and distributed load balancer targetting communication-bound applications.
• TreeMatch : Algorithm and tool to find a good process placement according to the communication pattern of an application and the target architecture. Project initially developed by Emmanuel Jeannot and Guillaume Mercier.

Collaborations

• Proactive Data Containers [WWW]
• Data movement optimizations
• Meeting: Lawrence Berkeley National Laboratory - Berkeley, CA - 2017/04/19 to 2017/04/20
• Remote weekly meeting since March 2016
• Joint Laboratory for Extreme Scale Computing [WWW]
• Toward taming large and complex data flows in data-centric supercomputing
• Visit: Inria Bordeaux Sud-Ouest - Talence, France : One week in July 2017 to work on deep memory hierarchy modeling
• Visit: Argonne National Laboratory - Argonne, IL : Two weeks in March 2015 to work on data locality in parallel I/O
• Joint Laboratory for Petascale Computing [WWW]
• NCSA - Urbana-Champaign, IL : Listener of the 8th JLPC Workshop
• Visit: Parallel Programming Laboratory - Urbana-Champaign, IL : Two weeks at the beginning of May 2012 (Charm++ Workshop, affinity-aware load balancing)
• Visit: Parallel Programming Laboratory - Urbana-Champaign, IL : One week at the end of August 2013 (Distributed and parallel affinity-aware load balancing)

Responsibilities

• Program Committee member of SC'20 (poster), ICPP 2020, CCGrid 2020, Heterogeneity in Computing Workshop (HCW 2017, HCW 2018, HCW 2019), Compas'2016
• Reviewer for HPML 2018, Euro-Par 2018, HiPC 2017, ISAV 2016 and SIMPAT 2014

Students Supervision

• Sergio Servantez (Undergraduate, Illinois Institute of Technology, since April 2018): Using RAM Area Network to Reduce Synchronization Costs in Collective I/O Operations
• Paul Gressier (Undergraduate, ENSEIRB Engineering school, 3 months internship in 2017): Optimizing Data Movement with Data Transformations

Scientific Mediation

• La Théorie des Jeux (Game Theory) - Workshop for the "Fête de la Science" at Inria Bordeaux - 2015
• SC14 at New Orleans, LA (Nov. 2014) : Demonstration of the 3d-printed and free humanoid robot Poppy for the Inria booth.
• Presentation of a part of my thesis during the poster session of the EDMI day (2014/11/05) - Poster
• Découvrez le parallélisme en faisant des gauffres (Discover parallelism by making waffles) - Workshop for the "Fête de la Science" at Inria Bordeaux - 2013
• Exhibitor for the Inria booth at Aquitec, an annual exhibition of Training and Carrier - 2013

2013-2014 : IUT Informatique Bordeaux

• Programmation Système, TD de Pierre Ramet
• Introduction aux Systèmes d'Exploitation, TP de Michel Billaud
• [Vietnam, HCM] Base de données Avancée, Cours de Pierre Ramet

2012-2013 : ENSEIRB

• Programmation Système, TD de Mathieu Faverge
• Système d'Exploitation (SE), TD de Brice Goglin
• Projet de SE, sujet de Brice Goglin

• Vice-president of the associative DIY ISP Aquilenet
• Board's member of the associative DIY ISPs federation FFDN